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The Essentials of Computer Organization and Architecture was awarded a "Textbook Excellence Award" ("Texty") in it's second, third, and fourth editions from the Text and Academic Authors Association (TAA) the only association devoted solely to serving textbook and academic authors since 1987. The "Textbook Excellence Award" recognizes works for their excellence in the areas of content, presentation, appeal, and teachability.Each new print copy of Essentials of Computer Organization and Architecture also includes Navigate 2 Advantage Access that unlocks a comprehensive and interactive eBook, student practice activities and assessments, a full suite of instructor resources, and learning analytics reporting tools.Bestselling text, The Essentials of Computer Organization and Architecture, Fifth Edition, is comprehensive enough to address all necessary organization and architecture topics, but concise enough to be appropriate for a single-term course. Its focus on real-world examples and practical applications encourages students to develop a "big-picture" understanding of how essential organization and architecture concepts are applied in the computing world. In addition to direct correlation with the ACM/IEEE guidelines for computer organization and architecture, the text exposes readers to the inner workings of a modern digital computer through an integrated presentation of fundamental concepts and principles.
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Page last updated on 2019 July 02B. Parhami, Computer Architecture: From Microprocessors to Supercomputers, Oxford Univ. Press, New York, 2005. (ISBN 0-19-515455-X, 556+xix pages, 300 figures, 491 end-of-chapter problems) Available for purchase from Oxford University Press and various college or on-line bookstores. Instructor's solutions manual is provided gratis by Oxford Univ. Press to instructors who adopt the textbook.Roadmap for Using This Book (PDF file) Presentations, Lecture Slides (in PowerPoint & PDF formats) Preface (with contents-at-a-glance and list of general references)Complete Table of Contents Instructor's Solutions Manual (Preface, and how to order) List of Errors (for the text and its solutions manual) Additions to the Text, and Internet Resources Translated Editions (Spanish)Author's Undergraduate Course on Computer Architecture Disclaimer and Credits: This book uses the MIPS instruction-set architecture to provide concrete examples for machine instructions and hardware structures required for their execution. As a prominent example of the class of reduced instruction-set architectures (RISC), MIPS has been found quite suitable for use in various educational settings. References to simplified RISC instruction sets under the designations MiniMIPS and MicroMIPS, introduced in Chapters 5 and 13, respectively, have no relations with specific architectures offered by MIPS Technologies, Inc. These simplifications form proper subsets of the well-documented MIPS instruction set and have not been otherwise modified. Reference is also made to SPIM, a software simulator for the MIPS instruction set, which is provided free of charge to everyone, courtesy of Dr. James R. Larus.Presentations, Lecture Slides The following PowerPoint and PDF presentations for the seven parts of the textbook are available for downloading.Part 1: Background and Motivation (ppt, pdf, last updated 2014/10/02) Part 2: Instruction-Set Architecture (ppt, pdf, last updated 2014/10/15) Part 3: The Arithmetic/Logic Unit (ppt, pdf, last updated 2014/10/28) Part 4: Data Path and Control (ppt, pdf, last updated 2014/11/18) Part 5: Memory System Design (ppt, pdf, last updated 2014/12/04) Part 6: Input/Output and Interfacing (ppt, pdf, last updated 2011/02/11) Part 7: Advanced Architectures (ppt, pdf, last updated 2011/02/23)
"... there is a tendency when you really begin to learn something about a thing not to want to write about it but rather to keep on learning about it ... unless you are very egotistical, which, of course, accounts for many books." Ernest Hemingway, Death in the AfternoonThe context of computer arhitecture Computer architecture is an area of study dealing with digital computers at the interface between hardware and software. It is more hardware-oriented than "computer systems," an area typically covered in courses by the same name in computer science or engineering, and more concerned with software than the fields known as "computer design" and "computer organization." The subject matter, nevertheless, is quite fluid and varies greatly from one textbook or course to another in its orientation and coverage. This explains, in part, why there are so many different textbooks on computer architecture and why yet another textbook on the subject might serve a useful purpose.Computer architecture encompasses a set of core ideas that are applicable to the design or understanding of virtually any computer, from the tiniest embedded microprocessors that control our appliances, cameras, and numerous other devices through personal, server, and mainframe machines to the most powerful supercomputers found only in (and affordable only by) large data centers or major scientific laboratories. It also branches into more advanced subfields, each with its own community of researchers, periodicals, symposia, and, of course, technical jargon. Computer designers must no doubt be familiar with the entire field to be able to use the range of available methods in designing fast, efficient, and robust systems. Less obvious is the fact that even simple computer users can benefit from a firm grasp of the core ideas and from an awareness of the more advanced concepts in computer architecture.A common theme in computer architecture is coping with complexity. Much of this complexity arises from our desire to make everything as fast as possible. Some of the resulting techniques, such as predictive and speculative execution, are at odds with other goals of system design that include low cost, compactness, power economy, short time to market, and testability. It is the constant push and pull of such conflicting requirements that makes computer architecture a thriving and exciting field of study. Adding to the excitement are the opposing forces of innovation and compatibility with existing investments in skills, systems, and applicationsScope and Features This textbook, an outgrowth of lecture notes that the author has developed and refined over many years, covers the core ideas of computer architecture in some depth and provides an overview of many advanced concepts that may be pursued in higher-level courses such as those on supercomputing, parallel processing, and distributed systems.Six key features set this book apart from competing introductory textbooks on computer architecture:a. Division of material into lecture-size chapters: In the author's approach to teaching, a lecture is a more or less self-contained module with links to past lectures and pointers to what will transpire in future. Each lecture, lasting one to two hours, has a theme or title and proceeds from motivation to details to conclusion. b. A large number of meaningful problems: At least 16 problems have been provided at the end of each of the 28 chapters. These are well-thought-out problems, many of them class-tested, that clarify the chapter material, offer new viewing angles, link the chapter material to topics in other chapters, or introduce more advanced concepts. c. Emphasis on both the underlying theory and actual designs: The ability to cope with complexity requires both a deep understanding of the theoretical underpinnings of computer architecture and examples of designs that help clarify the theory. Such designs also provide building blocks for synthesis and reference points for cost-performance comparisons. d. Linking computer architecture to other subfields of computing: Computer architecture is nourished by, and in turn feeds, other subfields of computer system design. Such links, from the obvious (instruction-set architecture vis-a-vis compiler design) to the subtle (interplay of architecture with reliability and security), are explained throughout the book. e. Broad coverage of important topics: The text covers virtually all the core topics in computer architecture, thus providing a balanced and complete view of the field. Examples of material not found in many other texts include detailed coverage of computer arithmetic (Chapters 9-12) and high-performance computing (Chapters 25-28). f. Unified and consistent notation/terminology: Every effort is made to use consistent notation/terminology throughout the text. For example, r always stands for the number representation radix, k for word width, and c, for carry. Similarly, concepts and structures are consistently identified with unique, well-defined names.Summary of topics The seven parts of this book, each composed of four chapters, have been written with the following goals:Part 1 sets the stage, provides context, reviews some of the prerequisite topics, and gives a taste of what is to come in the rest of the book. Included are two refresher-type chapters on digital circuits and components, a discussion of computer system types, an overview of digital computer technology, and a detailed perspective on computer system performance.Part 2 lays out the user's interface to computer hardware, also known as the instruction-set architecture (ISA). For concreteness, the instruction set of MiniMIPS (a simplified, yet very realistic, machine for which open reference material and simulation tools exist) is described. Included is a chapter on variations in ISA (e.g., RISC vs CISC) and associated cost-performance trade-offs.The next two parts cover the central processing unit (CPU). Part 3 describes the structure of arithmetic/logic units (ALUs) in some detail. Included are discussions of fixed- and floating-point number representations, design of high-speed adders, shift and logical operations, and hardware multipliers/dividers. Implementation aspects and pitfalls of floating-point arithmetic are also discussed.Part 4 is devoted to the data path and control circuits comprising modern CPUs. Beginning with stages of instruction execution, the needed components and control mechanisms are derived. This material is followed by an exposition of control design strategies, use of a pipelined data path for performance enhancement, and various limitations of pipelining due to data and control dependencies.Part 5 is concerned with the memory system. The technologies in use for primary and secondary memories are described, along with their strengths and limitations. It is shown how the use of cache memories effectively bridges the speed gap between CPU and main memory. Similarly, the use of virtual memory to provide the illusion of a vast main memory is explained.Part 6 deals with input/output and interfacing topics. A discussion of I/O device technologies is followed by methods of I/O programming and the roles of buses and links (including standards) in I/O communication and interfacing. Elements of processes and context switching, for exception handling or multithreaded computation, are also covered.Part 7 introduces advanced architectures. An overview of performance enhancement strategies, beyond simple pipelining, is presented, and examples of applications requiring higher performance are cited. The book concludes with design strategies and example architectures based on vector or array processing, multiprocessing, and multicomputing.Pointers on how to use the book For classroom use, the topics in each chapter of this text can be covered in a lecture of duration 1-2 hours. In his own teaching, the author has used the chapters primarily for 1.5-hour lectures, twice a week, in a 10-week quarter, omitting or combining some chapters to fit the material into the 18-20 lectures that are available. But the modular structure of the text lends itself to other lecture formats, self-study, or review of the field by practitioners. In the latter two cases, the readers can view each chapter as a study unit (for one week, say) rather than as a lecture. Ideally, all topics in each chapter should be covered before moving to the next chapter. However, if fewer lecture hours are available, then some of the subsections located at the end of chapters can be omitted or introduced only in terms of motivations and key results.Problems of varying complexities, from straightforward numerical examples or exercises to more demanding studies or miniprojects, have been supplied for each chapter. These problems form an integral part of the book and have not been added as afterthoughts to make the book more attractive for use as a text. A total of 491 problems are included. Assuming that two lectures are given per week, either weekly or biweekly homework can be assigned, with each assignment having the specific coverage of the respective half-part (two chapters) or part (four chapters) as its "title."An instructor's manual, with problem solutions, is available and can be requested by qualified instructors from Oxford University Press in New York (www.oup.com/us/highered). PowerPoint presentations, covering the seven parts, are available electronically through the author's Web page for the book at www.oup.com/us/PARHAMI. [From this OUP catalog page, follow the "Companion Website" link.] The book's Web page also includes a list of corrections and additional topics.References to seminal papers in computer architecture, key design ideas, and important state-of-the-art research contributions are listed at the end of each chapter. These references provide good starting points for doing in-depth studies or for preparing term papers/projects. A large number of classical papers and important contributions in computer architecture have been reprinted in [Swar76], [Siew82], and [Sohi98]. New ideas in the field appear in papers presented at the annual International Symposium on Computer Architecture [ISCA]. Other technical meetings of interest include Symposium on High-Performance Computer Architecture [HPCA], International Parallel and Distributed Processing Symposium [IPDP], and International Conference on Parallel Processing [ICPP]. Relevant journals include IEEE Transactions on Computers [TrCo], IEEE Transactions on Parallel and Distributed Systems [TrPD], Journal of Parallel and Distributed Computing [JPDC], and Communications of the ACM [CACM]. Overview papers and topics of broad interest appear in IEEE Computer [Comp], IEEE Micro [Micr], and ACM Computing Surveys [CoSu].Acknowledgments This text, Computer Architecture: From Microprocessors to Supercomputers, is an outgrowth of lecture notes the author has used for the upper-division undergraduate course ECE 154: Introduction to Computer Architecture at the University of California, Santa Barbara, and, in rudimentary forms, at several other institutions prior to 1988. The text has benefited greatly from keen observations, curiosity, and encouragement of my many students in these courses. A sincere thanks to all of them! Thanks are also due to engineering editors at Oxford University Press (Peter Gordon, who started the project, and Danielle Christensen, who guided it to completion) and to Karen Shapiro, who ably managed the production process. Finally, the granting of permission by Dr. James Larus, of Microsoft Research, for the use of his SPIM simulators is gratefully acknowledged.General referencesThe list that follows contains references of two types: (1) books that have greatly influenced the current text and (2) general reference sources for in-depth studies or research. Books and other resources that are relevant to specific chapters are listed in the end-of-chapter bibliographies.[Arch] WWW Computer Architecture Page, a Web resource kept by the Computer Science Department, University of Wisconsin, Madison, has a wealth of information on architecture-related organizations, groups, projects, publications, events, and people: arch/www/index.html[CACM] Communications of the ACM, journal published by the Association for Computing Machinery.[Comp] IEEE Computer, technical magazine published by the IEEE Computer Society.[CoSu] Computing Surveys, journal published by the Association for Computing Machinery.[Henn03] Hennessy, J. L., and D. A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann, 3rd ed., 2003.[HPCA] Proceedings of the Symposium(s) on High-Performance Computer Architecture, sponsored by IEEE. The 10th HPCA was held on February 14-18, 2004, in Madrid, Spain.[ICPP] Proceedings of the International Conference(s) on Parallel Processing, held annually since 1972. The 33rd ICPP was held on August 15-18, 2004, in Montreal, Canada.[IPDP] Proceedings of the International Parallel and Distributed Processing Symposium(s), formed in 1998 from merging IPPS (held annually beginning in 1987) and SPDP (held annually beginning in 1989). The latest IPDPS was held on April 26-30, 2004, in Santa Fe, New Mexico.[ISCA] Proceedings of the International Symposium(s) on Computer Architecture, held annually since 1973, usually in May or June. The 31st ISCA was held on June 19-23, 2004, in Munich, Germany.[JPDC] Journal of Parallel and Distributed Computing, published by Academic Press.[Micr] IEEE Micro, technical magazine published by the IEEE Computer Society.[Muel00] Mueller, S. M., and W. J. Paul, Computer Architecture: Complexity and Correctness, Springer, 2000.[Patt98] Patterson, D. A., and J. L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Morgan Kaufmann, 2nd ed., 1998.[Rals03] Ralston, A., E. D. Reilly, and D. Hemmendinger (eds.), Encyclopedia of Computer Science, Wiley, 4th ed., 2003.[Siew82] Siewiorek, D. P., C. G. Bell, and A. Newell, Computer Structures: Principles and Examples, McGraw-Hill, 1982.[Sohi98] Sohi, G. (ed.), 25 Years of the International Symposia on Computer Architecture: Selected Papers, ACM Press, 1998.[Stal03] Stallings, W., Computer Organization and Architecture, Prentice Hall, 6th ed., 2003.[Swar76] Swartzlander, E. E., Jr (ed.), Computer Design Development: Principal Papers, Hayden, 1976.[TrCo] IEEE Trans. Computers, journal published by the IEEE Computer Society.[TrPD] IEEE Trans. Parallel and Distributed Systems, journal published by the IEEE Computer Society.[Wilk95] Wilkes, M. V., Computing Perspectives, Morgan Kaufmann, 199
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